BSD Portscad 127 DragonFly ports
Computer aided design tools
| Port | Version | Repository | Comment |
|---|---|---|---|
| cad/abc | g20241117 | DPorts | System for sequential synthesis and verification |
| cad/admesh | 0.98.5_1 | DPorts | Program for processing STL triangulated solid meshes |
| cad/adms | 2.3.7 | DPorts | Model generator for SPICE simulators |
| cad/alliance | 5.1.1_6 | DPorts | Complete set of CAD tools and libraries for VLSI design |
| cad/antimony | 0.9.3.20230118 | DPorts | CAD from a parallel universe |
| cad/apio | 0.9.5 | DPorts | Open source ecosystem for open FPGA boards |
| cad/appcsxcad | 0.2.3 | DPorts | Minimal GUI Application using the QCSXCAD library |
| cad/astk-client | 2020.0.1_2 | DPorts | Graphical interface for Code_Aster (client side) |
| cad/astk-serveur | 2020.0.1_2 | DPorts | Graphical interface for Code_Aster (server side) |
| cad/atlc | 4.6.1_1 | DPorts | Tool to calculate the impedance of transmission lines |
| cad/calculix | 2.22 | DPorts | Three-Dimensional Structural Finite Element Program |
| cad/calculix-ccx | 2.22_1 | DPorts | Three-Dimensional Structural Finite Element Program |
| cad/cascade | 1.4_1 | DPorts | Simple tool to analyze noise and distortion of a RF system |
| cad/cascade-compiler | g20200105.1 | DPorts | Just-In-Time Compiler for Verilog from VMware Research |
| cad/chipvault | 200607 | DPorts | Project organizer for VHDL and Verilog RTL hardware designs |
| cad/csxcad | 0.6.3_4 | DPorts | C++ library to describe geometrical objects |
| cad/digital | 0.31 | DPorts | Digital logic designer and circuit simulator |
| cad/dinotrace | 9.4f_10 | DPorts | Graphical signal trace waveform viewer |
| cad/ecpprog | g20200725_1 | DPorts | Driver for FTDI based JTAG probes, to program ECP5 FPGAs |
| cad/electric | 7.0.0_5 | DPorts | Sophisticated electrical CAD system |
| cad/fasm | g20190920_1 | DPorts | FPGA assembly (FASM) parser and generator |
| cad/fdm_materials | 5.7.0,1 | DPorts | FDM Material database for 3D printers |
| cad/feappv | 5.1.2.e | DPorts | Finite element analysis program (personal version) |
| cad/fidocadj | 0.24.8 | DPorts | Easy to use graphical editor for electronics |
| cad/freehdl | 0.0.8_1 | DPorts | Free VHDL simulator |
| cad/fritzing | 0.9.2_21 | DPorts | CAD for printed circuit boards |
| cad/gds3d | g20220203 | DPorts | Application for rendering IC (chip) layouts in 3D |
| cad/gdscpp | g20200611 | DPorts | C++ library to create and read GDSII file |
| cad/gdsreader | 0.3.2_2 | DPorts | GDS2 stream file to Postscript and HP/GL converter |
| cad/gdstk | 0.9.59 | DPorts | C++ library for creation and manipulation of GDSII and OASIS files |
| cad/gdt | 4.0.4 | DPorts | GDS2/GDT format translator |
| cad/geda | 1.8.2_9,1 | DPorts | GPL Electronic Design Automation tools |
| cad/gerbv | 2.10.0 | DPorts | Gerber file viewer |
| cad/gmsh | 4.11.1_4 | DPorts | Automatic 3D finite element mesh generator |
| cad/gnucap | 2013.04.23 | DPorts | GNU Circuit Analysis Package |
| cad/gplcver | 2.12.a | DPorts | Verilog HDL simulator |
| cad/graywolf | 0.1.6.4_4 | DPorts | Fork of TimberWolf, a placement tool in VLSI design |
| cad/gspiceui | 1.1.00_7 | DPorts | GUI for ngspice and gnucap circuit simulators |
| cad/gtkwave | 3.3.122 | DPorts | Electronic Waveform Viewer |
| cad/hs-verismith | 1.0.0.2.40 | DPorts | Verilog fuzzer |
| cad/impact | 0.7.06.038_4,1 | DPorts | Dynamic Finite Element Program Suite |
| cad/irsim | 9.7.118 | DPorts | Event-driven logic-level simulator for MOS circuis |
| cad/iverilog | 12.0_1 | DPorts | Verilog simulation and synthesis tool |
| cad/k40-whisperer | 0.59 | DPorts | GUI control software for the stock K40 laser cutter controller |
| cad/ktechlab | 0.51.0_1 | DPorts | IDE for microcontrollers and electronics |
| cad/ldraw | 20220211,1 | DPorts | LDraw-format CAD files representing many of LEGO bricks produced |
| cad/ldview | 4.5_2 | DPorts | LDraw model viewer |
| cad/leocad | 23.03_1 | DPorts | CAD program for creating virtual LEGO models |
| cad/lepton-eda | 1.9.18_4 | DPorts | Lepton Electronic Design Automation |
| cad/libbgcode | 0.2.0_4 | DPorts | Prusa Block & Binary G-code reader/writer/converter |
| cad/libgdsii | 0.21 | DPorts | C++ library and command-line utility for reading GDSII geometry files |
| cad/libopencad | 0.2.0_5 | DPorts | Library which provides a way to read/write CAD (DWG/DXF/DXFB) files |
| cad/librecad | 2.2.1.1 | DPorts | 2D CAD system |
| cad/librepcb | 1.2.0 | DPorts | Schematic and PCB editing software |
| cad/librnd | 4.3.1 | DPorts | Flexible, modular two-dimensional CAD engine |
| cad/logisim | 2.7.1 | DPorts | Educational tool for designing and simulating logic circuits |
| cad/magic | 8.3.315_1 | DPorts | Interactive editor for VLSI layouts |
| cad/meshdev | 0.5_1 | DPorts | Mesh comparison software |
| cad/meshlab | 2020.05_1 | DPorts | 3D triangular meshes processing and editing tool |
| cad/netgen-lvs | 1.5.290 | DPorts | Tool for comparing netlists (a process known as LVS) |
| cad/ngspice_rework | 44.2 | DPorts | Mixed-signal circuit simulator derived from Spice and Cider |
| cad/opencascade | 7.8.1_5 | DPorts | Open CASCADE Technology, 3D modeling & numerical simulation |
| cad/openctm | 1.0.3_4 | DPorts | File format for compression of 3D triangle meshes |
| cad/opentimer | g20221116 | DPorts | High-performance timing analysis tool for VLSI systems |
| cad/oregano | 0.84.43_6 | DPorts | Schematic capture and circuit simulator |
| cad/p5-GDS2 | 3.35 | DPorts | GDS2 stream module |
| cad/p5-Verilog-Perl | 3.478 | DPorts | Building point for Verilog support in the Perl language |
| cad/padring | g20210731 | DPorts | Padring generator for ASICs |
| cad/pcb | 4.2.0_4,1 | DPorts | X11 interactive printed circuit board layout system |
| cad/pcb-rnd | 3.1.6 | DPorts | Flexible, modular Printed Circuit Board editor |
| cad/pdnmesh | 0.2.2_24 | DPorts | Mesh generator and solver for Finite Element problems |
| cad/py-amaranth | 0.5.4 | DPorts | Amaranth hardware definition language |
| cad/py-cocotb | 1.9.2 | DPorts | Coroutine based cosimulation library for writing VHDL and Verilog |
| cad/py-csxcad | 0.6.3_1 | DPorts | Python binding for csxcad, C++ library to describe geometrical objects |
| cad/py-edalize | 0.5.4 | DPorts | Library for interfacing EDA tools |
| cad/py-ezdxf | 1.0.2_2 | DPorts | Create and modify DXF drawings |
| cad/py-gdspy | 1.6.11_2 | DPorts | Python module for creating GDSII stream files |
| cad/py-gdstk | 0.9.59 | DPorts | Library for creation and manipulation of GDSII and OASIS files |
| cad/py-gmsh | 4.13.1_1 | DPorts | Automatic 3D finite element mesh generator (gmsh's own binding) |
| cad/py-lcapy | g20171202_6,1 | DPorts | Symbolic MDA Analysis Package for Linear Circuits |
| cad/py-phidl | 1.0.1_3 | DPorts | GDS-based CAD tool for photonic and superconducting circuits |
| cad/py-pyfda | 0.1_14 | DPorts | GUI tool for designing and analysing discrete time filters |
| cad/py-pygmsh | 7.1.17_3 | DPorts | Python frontend for Gmsh (on top of Gmsh's own binding) |
| cad/py-pymtl | 3.1.16 | DPorts | Python-based hardware generation, simulation, verification framework |
| cad/py-pyvcd | 0.4.1 | DPorts | Python VCD file support |
| cad/python-gdsii | 0.2.1_2 | DPorts | GDSII manipulation library |
| cad/qcsxcad | 0.6.3 | DPorts | Qt-GUI for CSXCAD |
| cad/qelectrotech | 0.9.0_1,1 | DPorts | Application to design electric diagrams |
| cad/qmls | 0.2 | DPorts | Quine-McCluskey Logic Simplifier |
| cad/qrouter | 1.4.88 | DPorts | Tool to generate metal layers and vias |
| cad/qspeakers | 1.6.8 | DPorts | Open source loudspeaker enclosure designer |
| cad/qucs-s | 25.1.1 | DPorts | Quite Universal Circuit Simulator: GUI for circuit simulation kernels |
| cad/qucsator | 0.0.20.4 | DPorts | Circuit simulator of the Qucs project |
| cad/repsnapper | 2.5.a5 | DPorts | Controller and GCode generator for RepRap 3D printers |
| cad/rubygem-gdsii | 1.0.0 | DPorts | GDSII reader and writer |
| cad/scotch | 6.0.4.a7_6 | DPorts | Package for graph and mesh partitioning and sparse matrix ordering |
| cad/solvespace | 3.1_2 | DPorts | Parametric 2d/3d CAD |
| cad/sp2sp | 20090213_1 | DPorts | Processor of waveform data generated by SPICE-type simulators |
| cad/stepcode | 0.8.2_1 | DPorts | Generates C++ and Python from ISO10303 files |
| cad/stm32flash | 0.7 | DPorts | Flash program for STM32 using the ST serial bootloader |
| cad/sumo | 1.2.0_20 | DPorts | Traffic simulation suite for road vehicles, public transportation, etc |
| cad/svlint | 0.9.3_7 | DPorts | SystemVerilog linter |
| cad/svls | 0.2.12_7 | DPorts | SystemVerilog language server |
| cad/sweethome3d | 7.1_1 | DPorts | Free interior 3D design application |
| cad/tochnog | 20140100_13 | DPorts | Free explicit/implicit Finite Element Program |
| cad/uranium | 4.13.1_3,1 | DPorts | Python framework for 3D printing applications |
| cad/verilator | 5.034 | DPorts | Synthesizable Verilog to C++ compiler |
| cad/verilog-mode.el | 801_23 | DPorts | Emacs lisp modules for the Verilog language |
| cad/veroroute | 2.39,1 | DPorts | PCB (printed circuit board) design software |
| cad/veryl | 0.11.0 | DPorts | Veryl: A modern Hardware Description Language (HDL) |
| cad/xcircuit | 3.10.30_2,1 | DPorts | X11 circuit schematics drawing program |
| cad/yosys | 0.36 | DPorts | Yosys Open SYnthesis Suite |
| cad/z88 | 15_2 | DPorts | Compact Finite Element Analysis System |
| devel/libarea | 20191031_1 | DPorts | CAM-related software for profile and pocketing operations |
| devel/libsavitar | 5.3.0 | DPorts | C++ implementation of 3mf loading/python bindings |
| games/netradiant | 20150621_7 | DPorts | Fork of GtkRadiant v1.5 FPS games map editor |
| games/trenchbroom | 2.0.0.b_13 | DPorts | Cross-platform level editor for Quake-engine based games |
| graphics/processing | 1.5.1,1 | DPorts | Programming environment for images, animation, and interactions |
| net/libarcus | 5.3.0_5,1 | DPorts | Communication library between internal components for Ultimaker |
| net/libcharon | 5.0.0 | DPorts | File metadata and streaming library |
| science/fastcap | 2.0.w.011109_1 | DPorts | Three-dimensional capacitance extraction program |
| science/fasthenry | 3.0.w.021113_1 | DPorts | Multipole-accelerated inductance analysis program |
| science/frontistr | 5.2_6 | DPorts | Large-Scale Parallel FEM Program for Nonlinear Structural Analysis |
| science/pulseview | 0.4.2_6 | DPorts | GUI client that supports various hardware logic analyzers |
| science/py-meshio | 5.3.5 | DPorts | I/O for many mesh formats |
| science/py-sdf | 0.1_3 | DPorts | Simple SDF mesh generation in Python |
| science/sigrok-cli | 0.7.2_2 | DPorts | Framework for hardware logic analyzers, CLI client |