BSD Portscad/iverilog 12.0 NetBSD
Verilog simulation and synthesis tool (stable release version)
- System
- NetBSD
- Repository
- pkgsrc
- Maintainer
- [email protected]
- License
- gnu-gpl-v2
- Categories
- cad
- Package size
- 1825.9 KiB, 6491.4 KiB installed
Description
Icarus Verilog is intended to compile ALL of the Verilog HDL as described in the IEEE-1364 standard. Of course, it's not quite there yet. It does currently handle a mix of structural and behavioral constructs.
Icarus Verilog is not aimed at being a simulator in the traditional sense, but a compiler that generates code employed by back-end tools.
In the other systems
| System | Port | Version |
|---|---|---|
| NetBSD | cad/iverilog | 12.0 |
| FreeBSD | cad/iverilog | 13.0 |
| OpenBSD | lang/iverilog | 13.0p0 |
| DragonFly | cad/iverilog | 12.0_1 |
| MidnightBSD | cad/iverilog | 12.0_1 |
| GhostBSD | cad/iverilog | 13.0 |
Install
Binary package:
pkgin install iverilogFrom pkgsrc:
cd /usr/pkgsrc/cad/iverilog && make install cleanPackages
The version each package repository carries. “-” means the repository builds no package of it, “n/a” that there is no such repository.
| Repository | Version |
|---|---|
| NetBSD 10.1 x86_64 | 12.0 |
| NetBSD 10.1 aarch64 | 12.0 |
| SmartOS / illumos x86_64 | 12.0 |
| macOS 15 arm64 | - |