BSD Ports

devel/py-apycula 0.30 NetBSD

Open Source tools for Gowin FPGAs

System
NetBSD
Repository
pkgsrc
Maintainer
[email protected]
Last update
Commit
65c9b1c391
License
mit
Categories
devel, python
Package size
3179.9 KiB, 5143.4 KiB installed

Description

Open source tools and Documentation for the Gowin FPGA bitstream format.

Project Apicula uses a combination of fuzzing and parsing of the vendor data files to provide Python tools for generating bitstreams.

Install

Binary package:

pkgin install py312-apycula

From pkgsrc:

cd /usr/pkgsrc/devel/py-apycula && make install clean

Packages

The version each package repository carries. “-” means the repository builds no package of it, “n/a” that there is no such repository.

RepositoryVersion
NetBSD 10.1 x86_640.30
NetBSD 10.1 aarch640.30
SmartOS / illumos x86_640.34
macOS 15 arm640.34

Dependencies

Run dependencies 4
Required by 1

Configuration

No options to configure.

Service scripts
none
Flavors
py313-apycula-0.30, py314-apycula-0.30

Commit history 3

DateCommitCreditsLog message
65c9b1c391 adam Forget Python 3.10
ad444aa4c1 adam py-apycula: updated to 0.34
0.34 Fix RAW_ALU_LUT. GitHub CI: updated workflows to avoid Node.js version warnings Add GW_JTAG support for TangNano20k / GW2A-18C (under instruction from YRabbit) Yosys 0.96 Fix bypass register attributes in DSP Fix LVDS and IBUFs in one bank. fix unassigned offx variable in get_pll_bels BUGFIX. PLL's bels offsets GW5AT-60B. Implement the clocks.
3784c9a20e adam py-apycula: updated to 0.33
0.33 GW5A. Enable more CLKDIV2/CLKDIV Take into account the I/O used. Set CE mux for DFFs. Add some notes for the emcu primitive of the GW1NSR CMake Yosys Hyperram pins constraints dat_parser: support partType-1 .dat files GW1N-2. Recognize device + build chipdb GW1N-2. Pinout, IO config, OSC Fix ram pins. Change io standard in examples. Fix HCLK pip fuses. gowin_pack: add multiboot address support Rewriting gowin_pack Add GW5AT-60B.