BSD Ports

cad/yosys 0.69_1 FreeBSD

Yosys Open SYnthesis Suite

System
FreeBSD
Repository
FreeBSD ports
Maintainer
[email protected]
Last update
Commit
97a84ef467
License
ISCL
Categories
cad
Package size
6399.9 KiB, 30787.2 KiB installed

Description

Yosys is a framework for Verilog RTL synthesis. It currently has extensive Verilog-2005 support and provides a basic set of synthesis algorithms for various application domains.

In the other systems

SystemPortVersion
FreeBSDcad/yosys0.69_1
OpenBSDcad/yosys0.70
DragonFlycad/yosys0.36
MidnightBSDcad/yosys0.52_1
GhostBSDcad/yosys0.69

Install

Binary package:

pkg install yosys

From the ports tree:

cd /usr/ports/cad/yosys/ && make install clean

To depend on this port in another port's Makefile:

RUN_DEPENDS=	yosys>0:cad/yosys

Packages

The version each package repository carries. “-” means the repository builds no package of it, “n/a” that there is no such repository.

Repositoryaarch64amd64armv6armv7i386
FreeBSD:14:latest0.69_10.69_1---
FreeBSD:14:quarterly0.69_10.69_1n/a--
FreeBSD:15:latest0.69_10.69_1n/a-0.52
FreeBSD:15:quarterly0.69_10.69_1n/an/an/a
FreeBSD:16:latest0.69_10.69_1n/an/an/a
FreeBSD:16:quarterlyn/an/an/an/an/a

Dependencies

As this port's Makefile names them.

Build 5

Library 3

Runtime 3

Test 1

The full lists below include those, and their dependencies in turn.

Build dependencies 30
Run dependencies 123

The first 100 are listed.

Configuration

Options name: cad_yosys

OptionDefaultDescription
CVC5offCVC SAT Solver
TCMALLOConUse the tcmalloc memory allocation library
YICESonYices SAT Solver
Z3offZ3 SAT Solver
USES
bison cmake:testing compiler:c++20-lang pkgconfig python readline shebangfix tcl
Service scripts
none

Files

pkg-plist 321
  • share/yosys/abc9_map.v
  • share/yosys/abc9_model.v
  • share/yosys/abc9_unmap.v
  • share/yosys/achronix/speedster22i/cells_map.v
  • share/yosys/achronix/speedster22i/cells_sim.v
  • share/yosys/adff2dff.v
  • share/yosys/analogdevices/abc9_model.v
  • share/yosys/analogdevices/arith_map.v
  • share/yosys/analogdevices/brams.txt
  • share/yosys/analogdevices/brams_defs.vh
  • share/yosys/analogdevices/brams_map.v
  • share/yosys/analogdevices/cells_map.v
  • share/yosys/analogdevices/cells_sim.v
  • share/yosys/analogdevices/dsp_map.v
  • share/yosys/analogdevices/ff_map.v
  • share/yosys/analogdevices/lut_map.v
  • share/yosys/analogdevices/lutrams.txt
  • share/yosys/analogdevices/lutrams_map.v
  • share/yosys/analogdevices/mux_map.v
  • share/yosys/anlogic/arith_map.v
  • share/yosys/anlogic/brams.txt
  • share/yosys/anlogic/brams_map.v
  • share/yosys/anlogic/cells_map.v
  • share/yosys/anlogic/cells_sim.v
  • share/yosys/anlogic/eagle_bb.v
  • share/yosys/anlogic/lutrams.txt
  • share/yosys/anlogic/lutrams_map.v
  • share/yosys/choices/han-carlson.v
  • share/yosys/choices/kogge-stone.v
  • share/yosys/choices/sklansky.v
  • share/yosys/cmp2lcu.v
  • share/yosys/cmp2lut.v
  • share/yosys/cmp2softlogic.v
  • share/yosys/dff2ff.v
  • share/yosys/ecp5/ccu2c_sim.vh
  • share/yosys/ecp5/cells_bb.v
  • share/yosys/ecp5/cells_ff.vh
  • share/yosys/ecp5/cells_io.vh
  • share/yosys/ecp5/cells_sim.v
  • share/yosys/ecp5/common_sim.vh
  • share/yosys/efinix/arith_map.v
  • share/yosys/efinix/brams.txt
  • share/yosys/efinix/brams_map.v
  • share/yosys/efinix/cells_map.v
  • share/yosys/efinix/cells_sim.v
  • share/yosys/efinix/gbuf_map.v
  • share/yosys/gate2lut.v
  • share/yosys/gatemate/arith_map.v
  • share/yosys/gatemate/brams.txt
  • share/yosys/gatemate/brams_init_20.vh
  • share/yosys/gatemate/brams_init_40.vh
  • share/yosys/gatemate/brams_map.v
  • share/yosys/gatemate/cells_bb.v
  • share/yosys/gatemate/cells_sim.v
  • share/yosys/gatemate/inv_map.v
  • share/yosys/gatemate/lut_map.v
  • share/yosys/gatemate/lut_tree_cells.genlib
  • share/yosys/gatemate/lut_tree_map.v
  • share/yosys/gatemate/mul_map.v
  • share/yosys/gatemate/mux_map.v
  • share/yosys/gatemate/reg_map.v
  • share/yosys/gowin/arith_map.v
  • share/yosys/gowin/brams.txt
  • share/yosys/gowin/brams_map.v
  • share/yosys/gowin/brams_map_gw5a.v
  • share/yosys/gowin/cells_latch.v
  • share/yosys/gowin/cells_map.v
  • share/yosys/gowin/cells_sim.v
  • share/yosys/gowin/cells_xtra_gw1n.v
  • share/yosys/gowin/cells_xtra_gw2a.v
  • share/yosys/gowin/cells_xtra_gw5a.v
  • share/yosys/gowin/dsp_map.v
  • share/yosys/gowin/lutrams.txt
  • share/yosys/gowin/lutrams_map.v
  • share/yosys/ice40/abc9_model.v
  • share/yosys/ice40/arith_map.v
  • share/yosys/ice40/brams.txt
  • share/yosys/ice40/brams_map.v
  • share/yosys/ice40/cells_map.v
  • share/yosys/ice40/cells_sim.v
  • share/yosys/ice40/dsp_map.v
  • share/yosys/ice40/ff_map.v
  • share/yosys/ice40/latches_map.v
  • share/yosys/ice40/spram.txt
  • share/yosys/ice40/spram_map.v
  • share/yosys/include/backends/cxxrtl/runtime/README.txt
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.cc
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi.h
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.cc
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/capi/cxxrtl_capi_vcd.h
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl.h
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_replay.h
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_time.h
  • share/yosys/include/backends/cxxrtl/runtime/cxxrtl/cxxrtl_vcd.h
  • share/yosys/include/backends/rtlil/rtlil_backend.h
  • share/yosys/include/frontends/blif/blifparse.h
  • share/yosys/include/kernel/binding.h
  • share/yosys/include/kernel/bitpattern.h
  • share/yosys/include/kernel/cellaigs.h
  • share/yosys/include/kernel/celledges.h

The first 100 are listed.

distinfo 4
FileSizeSHA256
YosysHQ-yosys-v0.69_GH0.tar.gz3.686126e+062a0831468cb1fe08ce5fff111d4cb8763dd6d744c9d981f6c7c6b2a6ce37bcd2
fmtlib-fmt-a00f82c6b6_GH0.tar.gz74188428ebc2a49002c87f2326fb01ef61807c3b625b07533bdf1549ffadc7ce07b89d
jarro2783-cxxopts-4bf61f0869_GH0.tar.gz16062054f2fd414aa402150bcf2a61cea3d26d5833ac4f31a847d4dbad9c58d33e2967
YosysHQ-symfpu-5d5e508674_GH0.tar.gz86713e4c45384be9e716d75e1d27cfe3de07a4d97e912398a15e3a79e414d80a479a2

Commit history 4

DateCommitCreditsLog message
97a84ef467 Dima Panov */*: update boost consumers after boost-1.92
f8b5d9d870 Yuri Victorovich cad/yosys: update 0.66 → 0.69
c3ee0d25f0 Älven math/z3: Update 5.0.0.0 => 5.1.0.0
Approved by: arrowd@ (maintainer) Approved by: db@, yuri@ (Mentors, implicit) Differential Revision: https://reviews.freebsd.org/D58886
dfa5362257 Yuri Victorovich math/z3: update 4.16.0.0 → 5.0.0.0
PR: 297106 Approved by: Gleb Popov <[email protected]> (maintainer)